Technical Details

HICore 1


HICore architecture

HIMA’s HICore 1 architecture is based on a redundant 1oo2D microcontroller system with DP80390 processor cores. Thanks to an additional microcontroller, the integrated communication subsystem operates independently and interference-free.

All three microcontrollers feature separate on-chip debugging units, data and program memories and communication interfaces.

Integrated hardware comparators, memory protection units, programmable watchdogs, power supply monitoring and other features allow HICore 1 to fulfil all functional safety requirements of the IEC 61508, Edition 2, (part 1 to 7), SIL3 standard.



  • The HICore 1 IC

    • Safety system-on-chip: a fully safe programmable logic controller
    • 1oo2D architecture
    • SIL 3 certified according to IEC 61508, Edition 2, Part 1 to 7, and PL e compliant according EN 13849
    • SIL 3 certified safe operating system

    Engineering

    For more details on engineering with HICore 1, please contact hicore@hima.com



  • Technical facts

    • Core frequency up to 135 MHz
    • Core voltage 1.8V
    • I/O voltage 3.3V
    • Operating temperature –40 °C…105 °C
    • Enclosure FPBGA256

    I/Os

    • 32 safe digital inputs
    • 30 safe digital outputs
    • 8 safe counter inputs
    • 2 PWM outputs
    • 3 high-speed UARTs
    • 3 SPI ports
    • 2 CAN bus interfaces
    • Fast Ethernet



  • Communication system

    • Interference-free and intrinsically safe operating system
    • Interfaces for non-safe applications
    • Support for individual applications, e.g. web server

    Middleware

    • SIL 3-certified middleware
    • Covers all safety-relevant aspects
    • Safe control of all interfaces
    • Simplified implementation of safety-related applications in C/C++



Downloads
HICore 1 Product NewsHICore TÜV Zertifikat HICore SystemFacts
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