HIMA’s HICore 1 architecture is based on a redundant 1oo2D microcontroller system with DP80390 processor cores. Thanks to an additional microcontroller, the integrated communication subsystem operates independently and interference-free.
All three microcontrollers feature separate on-chip debugging units, data and program memories and communication interfaces.
Integrated hardware comparators, memory protection units, programmable watchdogs, power supply monitoring and other features allow HICore 1 to fulfil all functional safety requirements of the IEC 61508, Edition 2, (part 1 to 7), SIL3 standard.
For more details on engineering with HICore 1, please contact email@example.com